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"Multi-purpose systems: A novel dataflow-based generation and mapping strategy"
J. Nezan, N. Siret, M. Wipliez, F. Palumbo and L. Raffo
Proc. of the "2012 IEEE International Symposium on Circuits and Systems" (ISCAS 2012), Seoul, South Korea, May 20-23, 2012.
IEEE Conference Publications, ISCAS 2012 (2012) 3073-3076
ISBN: 978-1-4673-0219-7
The manual creation of specialized hard-ware infrastructures for complex multi-purpose systems is error-prone and time-consuming. Moreover, lots of effort is required to define an optimized and heterogeneous components library. To tackle these issues, we propose a novel design flow based on the Dataflow Process Networks Model of Computation. In particular, we have combined the operation of two state of the art tools, the Multi-Dataflow Composer and the Open RVC-CAL Compiler, handling respectively the automatic mapping of a reconfigurable multi-purpose substrate and the high level synthesis of hardware components. Our approach guarantees runtime efficiency and on-chip area saving both on FPGAs and ASICs.
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