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"General features of progressive breakdown in gate oxides: A compact model"
F. Palumbo, S. Lombardo and M. Eizenberg
Proc. of the "International Reliability Physics Symposium" (IRPS 2015), Monterey, CA, USA, April 19-23, 2015.
IEEE Conference Publications, IRPS 2015 (2015) 5A.1.1-5A.1.6
Abstract
We show and discuss some general features of dielectric breakdown of ultra-thin gate oxides for CMOS. We discuss III-V devices with high-k/metal gate, and compare to more classical structures with silicon substrates, SiOxNy or high-k as gate dielectrics, and poly-Si or metal gate. A model of the breakdown growth dependence on voltage, temperature, oxide thickness, etc., is discussed and compared to data.
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